1. ► Calling vpi_control(vpiStop) will terminate the simulation.
2. ► Incorrectly written VPI applications may leak memory.
3. ► BFM stands for Bus Flow Model.
4. ► A cbValueChange callback can be directly registered from vlog_startup_routines called registration function.
5. ► VPI provides routines using which one can easily traverse over design graph.
6. ► Providing tf.type as vpiSysTask in the s_vpi_systf_data will export the corresponding ‘C’ routine as a task.
7. ► Bus Monitors only snoop the bus and store the data in easily retrievable form.
8. ► vpi_scan extracts only one element from iterator as obtained using vpi_iterate.
9. ► Verilog compiler can detect argument mismatch between Verilog and ‘C’ land when a routine is called as a function.
10. ► vpiSysTfCall returns the handle to the task or function call which occurred in Verilog and in turn called this C/C++ routine.
11. ► It is a good practice to have checkers which directly connect to RTL signals in various RTL components.
12. ► CompileTf routines can make use of all the VPI routines.
13. ► There is significant overhead of moving data between simulation and C domains.
14. ► CompileTf routines are called only once for any given function.
15. ► Verilog compiler can detect output mistmatch between Verilog and ‘C’ land when routine is exported as a function.